The present invention relates to a multiplex anode driver circuit for chiefly driving a graphic fluorescent display device employing a multiplex (duplex, quadplex, or octuplex) anode matrix scheme and to a fluorescent display device using the same. The present invention can be used for driving conventional consumer, industrial, or in-vehicle fluorescent display devices. That is, the present invention can be used for fluorescent display devices in a simple anode matrix scheme, in addition to fluorescent display devices in a multiplex anode matrix scheme. The present invention is applicable in all time-proven fields of fluorescent display devices.
Fluorescent display devices in an anode multi-matrix scheme are well known as fluorescent display devices that can provide light emission with high intensity, with uniform brightness, and with less variation in brightness.
A fluorescent display device employing a quadplex anode matrix scheme as an anode multi-matrix scheme will be now explained as an example. In a fluorescent display device of this type, dot-like anodes are arranged in a matrix form which includes plural rows each formed of plural dot-like anodes. A fluorescent substance is coated on the surface of each anode. Four anode connection terminals are disposed to each row.
In each row, the anodes appearing every four places are connected to the common anode connection terminal. A grid is disposed above the anodes appearing every two columns so as to confront each other. A cathode, e.g. a filament cathode, which emits electrons, is suspended above each grid so as to confront each other.
FIG. 15 is a diagram illustrating the connection configuration of anodes in a fluorescent display device employing the quadplex anode matrix scheme. FIG. 16 is shows a wiring diagram of the connection configuration shown in FIG. 15. In the anode connection configuration of FIGS. 15 and 16, one row of anodes is schematically shown.
Referring to FIG. 15, the anode A2 in the second column is connected to the anode A2a. The anode A3 in the third column is connected to the anode A3a. The anodes A2 and A2a are light emitted simultaneously by a positive voltage applied to the anode connection terminal AT1-2. The anodes A3 and A3a are light emitted simultaneously by a positive voltage applied to the anode connection terminal AT1-3. At this time, other anodes do not glow because a negative voltage is applied to the anode connection terminals connected to them.
Moreover, the anode A1 in the first column is connected to the anode A1a. The anode A4 in the fourth column is connected to the anode A4a. The anodes A1 and A1a are light-emitted simultaneously by a positive voltage applied to the anode connection terminal AT1-1. The anodes A4 and A4a are light emitted simultaneously by a positive voltage applied to the anode connection terminal AT1-4. At this time, other anodes do not glow because a negative voltage is applied to the anode connection terminal connected to them.
In the above-mentioned configuration, the wiring pattern for the anode connection terminal AT1-1 is disposed between the wiring pattern for the anode connection terminal AT1-2 and the wiring pattern for the anode connection terminal AT1-3. When a positive voltage is applied to the anode connection terminals AT1-2 and AT1-3, the anodes A1 and A1a associated with the anode connection terminal AT1-1 are in a non-glow state.
The wiring pattern for the anode connection terminal AT1-3 is disposed between the wiring pattern for the anode connection terminal AT1-1 and the wiring pattern for the anode connection terminal AT1-4. When a positive voltage is applied to the anode connection terminals AT1-1 and AT1-4, the anodes A3 and A3a associated with the anode connection terminal AT1-3 is in a non-glow state.
In the connection configuration shown in FIG. 15, the wiring pattern for the anode connection terminal (AT1-2, AT1-3 shown in FIG. 15), to which anodes (A2, A2a, A3, A3a in FIG. 15) in a non-glow state are connected, is disposed between the wiring pattern for anode connection terminal (AT1-1 in FIG. 15), to which anodes (A1 and A1a in FIG. 15) in a glow state are connected, and the wiring pattern for anode connection terminal (AT1-4 in FIG. 15), to which anodes (A4 and A4a in FIG. 15) in a glow state are connected. That is, the wiring pattern for anode connection terminal to which a positive voltage is applied and the wiring pattern to which a negative voltage is applied are disposed alternately.
In the fluorescent display device employing the quadplex anode matrix scheme, each grid is wired so as to cover two columns of anodes. Grids are scanned such that a positive voltage is always applied to two adjacent grids. A positive voltage is applied to the two middle anodes among the four anodes, corresponding to two grids to which the positive voltage is applied. The negative voltage is applied to the remaining anodes. By doing so, the anode dot at a desired position in a desired row of anodes is selectively light emitted.
In the fluorescent display device employing the quadplex anode matrix scheme, the wiring pattern for the anode connection terminal accepting a positive voltage and the wiring pattern for the anode connection terminal accepting a negative voltage are arranged alternately. Anodes to be light emitted simultaneously are alternately connected to the anode connection terminals. For that reason, when a positive voltage is applied to the anode connection terminal to light emit an anode, a capacitance occurs between the wiring patterns for adjacent anode connection terminals. This causes the phenomenon where the current is charged into the capacitance.
In further explanation, a positive voltage is applied to the anode connection terminal AT1-1, AT1-4, the capacitance C, as shown in FIG. 16, occurs between the anode connection terminal AT1-1, AT1-4 and the wiring pattern for the anode connection terminal AT1-2, AT1-3 to which a negative voltage is applied. That is, the capacitance C occurs between all the anode connection terminals AT1-1, AT1-2, AT1-3, and AT1-4. Thus, a current is charged to each capacitance C.
The current charging the each capacitance C does not contribute to the light emission of the fluorescent display device. The peak current excessively heats the anode driver circuit that supplies the voltage to the anode connection terminals AT1-1, AT1-2, AT1-3, and AT1-4.
In the small fluorescent display devices, because the wiring pattern to each anode connection terminal is smaller and shorter, the capacitance between wiring conductors viewed from the anode driver circuit is not enough to heat the anode driver circuit. However, with the fluorescent display devices large-sized, the wiring pattern lengthened to each anode connection terminal tends to increase the influence due to heat generation, compared with the conventional small fluorescent display devices.
With the large-sized fluorescent display devices having the above anode connection configuration, the anode connection has the problem in that heat loss occurs in the anode driver circuit. That is, when two adjacent columns of anodes to a predetermined row glow, the capacitance produced between the wring patterns for all anode connection terminals is charged with current. The capacitance viewed from the anode driver circuit becomes large. The peak current of the charging current largely heats the anode driver circuit, thus causing a heat loss.
In order to solve that problem, the present applicant filed a fluorescent display device having an improved anode connection configuration (Japanese Patent Laid-open Publication No. Hei 10-55772).
FIG. 17 schematically shows the anode wiring in the fluorescent display device employing a quadplex anode matrix scheme, disclosed in the publication No. Hei 10-55772.
Referring to FIG. 17, numerals 1G, 2G, 3G, . . . represent grids, respectively. Numerals 1-2, 1-3, 1-1, 1-4, 2-2, 2-3, 2-1, 2-4, . . . represent anode wiring conductors, respectively. It is noted that anode segments 1-1, 1-2, 1-3 and 1-4 are arranged in numerical order in the wiring direction but anode wiring conductors 1-2, 1-3, 1-1 and 1-4 are arranged irregularly.
The irregular arrangement of the anode wiring conductors is inconvenient when the anode driver circuit drives them. That is, in order to solve the heat generation of the anode driver circuit caused by the capacitance between wiring patterns, the irregular anode connection structure shown in FIG. 16 has to be employed. Moreover, in the case of the quadplex anode matrix scheme, the restriction on designing a fluorescent display device makes it impossible to rearrange the anode wiring patterns according to the arrangement order of anodes.
The configuration and the driving method of the conventional anode driver circuit, which is used for fluorescent display devices in the quadplex anode matrix scheme, using the irregular anode connection as shown in FIG. 17 will be described below.
FIG. 18 is a timing chart when a fluorescent display device in the quadplex anode matrix scheme is driven. FIG. 19 is a table listing timing data for grid scanning. FIG. 20 is a matrix table listing an anode segment to be light emitted in conjunction with grid timing. FIG. 21 is a schematic diagram of an anode driver circuit. FIG. 22 is diagram showing an example of connections between driver outputs Q and anode segments. FIG. 23 is a drive timing chart for a conventional anode driver.
The driving scheme called the dual grid scanning is used as the grid driving method for a fluorescent display device in a multiple anode matrix scheme (e.g. in a quadplex anode matrix scheme). That is, as shown by the timing chart in FIG. 18 and the timing data in FIG. 19, grids are scanned one by one while two grids are being always turned on (in the order of grids G1, G2xe2x86x92G2, G3, xe2x86x92G3, G4). The grid timing when grids are scanned one by one is called the grid timing (T1 to Tn in FIG. 18).
Anodes are driven in synchronous with the grid timing, thus being light emitted. FIG. 20 is a matrix table for anode segments to be light emitted with the grid timing. Referring to FIG. 20, symbol ◯ represents an anode segment to be light emitted. Symbol X represents no anode segment to be light emitted.
Referring to FIG. 20, if anode segments (X) glow, leakage of light occurs during displaying, thus degrading the display quality. In avoid such a phenomenon, the display data must be set to xe2x80x9cLxe2x80x9d to bring anode segments (X) to a non-glow state al all times. The anode segments (◯) glow when the display data is xe2x80x9cHxe2x80x9d but does not glow when the display data is xe2x80x9cLxe2x80x9d.
However, in the anode driver circuit in accordance with the conventional driving scheme, display data xe2x80x9cLxe2x80x9d are transferred to anode segments (X) shown in FIG. 20. For that reason, the RAM has to store display data for anode segments (X) shown in FIG. 20. The display data corresponding to anode segments (X) do not directly engage in selection of display lighting, thus becoming wasteful. Storing unnecessary data increases the capacity of the RAM. As a result, the RAM capacity is restricted because of the problem on costs, the capacity usable for other purposes (e.g. for gray level display) is reduced. Moreover, in the conventional anode driver circuit, the number of bits of display anode data transferred with each grid timing becomes nxc3x974. Hence, in the case where the transfer of data for the anode segments (X) are omitted, the transfer rate, which corresponds to the bit number twice the number of the omitted transfer bits (in this example, nxc3x972), is required.
As shown in FIG. 21, the anode driver circuit, which drives a fluorescent display device in a quadplex anode matrix scheme, is generally called a shift register, latch and driver, including a shift register, a latch, and an anode driver. In the anode driver circuit, the display data (anode data), as shown in FIGS. 21 and 22, is synchronized with the clocks input to the serial clock CLK and then is input from the serial input SI via the clock synchronous serial interface. The display data is transferred to necessary bits, or up to n bits of the shift register 31. Then, the latch circuit 32 holds the data from the shift register 31 in response to the latch LAT. The data held in the latch circuit 32 controls the outputs Q of the output circuit (anode driver) 33. The outputs Q of the anode driver 33, as shown in FIG. 22, are input to target anode segments in the fluorescent display device. Referring to FIG. 22, the output Q1 of the anode driver is input to the anode segment 1-2. The output Q2 of the anode driver is input to the anode segment 1-3. The output Q3 of the anode driver is input to the anode segment 1-1. The output Q4 of the anode driver is input to the anode segment 1-4.
In the shift register 31 of the anode driver circuit, anode data is sequentially input to the serial input SI and then is sent from R1 to R2, R3, , . . . and Rn. The registers R1, R2, R3, . . . correspond to the driver output Q1, Q2, Q3, . . . , respectively. However, the anode wiring conductors in the fluorescent display device are arranged irregularly, as described previously. For that reason, the problem is that the anode data must be transferred in consideration with the irregular arrangement of the anode wiring conductors.
If the order of the anode wiring conductors cannot be changed, the driver outputs are rearranged without any trouble. However, such an approach is specialized for only the quadplex anode matrix scheme, but cannot be employed for other anode matrix schemes (for example, the simple, duplex, and octuplex anode matrix schemes). That is, the problem is that the data format depends on the drive scheme and that drivers in all types of drive schemes cannot be used in common, so that the versatility cannot be provided.
For reference, FIG. 24 shows a table listing the terminal functions of a conventional anode driver. FIG. 25 illustrates connections between anode segments and the registers R of the shift register in the conventional anode driver.
The present invention is made to solve the above-mentioned problems.
An advantage of the invention is to provide a multiplex anode driver circuit capable of reducing the anode data memory capacity by removal of unnecessary data, thus improving the anode data transfer rate.
Another advantage of the present invention is to provide a multiplex anode driver circuit capable of using in common driver circuits in various driving schemes, without depending on software, and thus enabling small-sized hardware.
Further another advantage of the present invention is to provide a fluorescent display device, which employs the above-mentioned multiplex anode driver circuit.
In an aspect of the present invention, a multiplex anode driver circuit suitable for a fluorescent display device, the fluorescent display device including dot-like anodes arranged in a matrix form and having surfaces each on which a fluorescent substance is coated, grids each confronting two columns of anodes, and cathodes confronting said grids, wherein anode data is input to a predetermined anode in synchronous with the timing when two adjacent grids are sequentially scanned in a direction of a row of anodes, comprises shift registers in a two system, formed of a first shift register being allocated to an even-numbered grid timing and to an odd numbered grid timing when the grids are scanned and second shift register being allocated to odd numbered grid timing when the grids are scanned; a first group of latch circuits respectively connected to registers in the first shift register, each for holding anode data of a corresponding register, and a second group of latch circuits respectively connected to registers in the second shift register, each for holding anode data of a corresponding register; and a memory for storing anode data to be input to the shift register; wherein while blanking input to the first group of latch circuits associated the first shift register and blanking input to the second group of latch circuits associated the second shift register are being alternately released, the odd-numbered grid timing and the even-numbered grid timing are selected, so that anode data is transferred from the memory.
In the multiplex anode driver circuit, when a drive scheme is selectively set from among a simple anode matrix scheme, a duplex anode matrix scheme, a quadplex anode matrix, and an octuplex anode matrix scheme, the shift registers in a two system are selectively connected in conjunction with a selected drive scheme to obtain drive outputs corresponding to the wiring state of the anodes, so that anode data is transferred.
In another aspect, the present invention relates to a fluorescent display device using a multiple anode driver circuit suitable, the fluorescent display device including dot-like anodes arranged in a matrix form and having surfaces each on which a fluorescent substance is coated, grids each confronting two columns of anodes, and cathodes confronting the grids, wherein anode data is input to a predetermined anode in synchronous with the timing when two adjacent grids are sequentially scanned in a direction of a row of anodes. The multiplex anode driver circuit comprises shift registers in a two system, formed of a first shift register being allocated to an even-numbered grid timing and to an odd numbered grid timing when the grids are scanned and second shift register being allocated to odd numbered grid timing when the grids are scanned; a first group of latch circuits respectively connected to registers in the first shift register, each for holding anode data of a corresponding register, and a second group of latch circuits respectively connected to registers in the second shift register, each for holding anode data of a corresponding register; and a memory for storing anode data to be input to the shift register. While blanking input to the first group of latch circuits associated the first shift register and blanking input to the second group of latch circuits associated the second shift register are being alternately released, the odd-numbered grid timing and the even-numbered grid timing are selected, so that anode data is transferred from the memory.
In the fluorescent display device, when a drive scheme is selectively set from among a simple anode matrix scheme, a duplex anode matrix scheme, a quadplex anode matrix and an octuplex anode matrix scheme, the multiplex anode driver circuit selectively connects said shift registers in a two system, in conjunction with a selected drive scheme, to obtain drive outputs corresponding to the wiring state of said anodes, and then transmits anode data.